超大规模集成电路计算机辅助设计 1：逻辑

你将学到什么

课程概况

现代超大规模集成电路非常复杂， 包含数以亿计的晶体管，上百万个部署运算和控制的逻辑门，大型内存块，由第三方（即所谓的“知识产权”——在芯片设计中指对某种设计技术的专利，或IP模块）预先设计的嵌入式模块。 那么如何设计这些复杂的芯片？ 答案就是： 计算机辅助设计（CAD）工具，通过计算机对芯片进行抽象描述，逐步完善，直至最终完成设计。本课程重点介绍用于制作特定用途集成电路（ASIC）或系统芯片（SoC）的主要设计工具， 侧重于合成和验证逻辑布局有效性的关键表示；

旨在帮助学生理解设计软件的基本算法、数据结构和工作原理。本课程适用于以下人群：(1)对构建VLSI设计工具感兴趣； (2)对VLSI芯片设计和软件工具的设计原理感兴趣； (3)喜欢超酷算法，即对涉及位、逻辑门、几何图形、图表、矩阵和时间等因素的问题进行计算。

A modern VLSI chip has a zillion parts — logic, control, memory, interconnect, etc. How do we design these complex chips? Answer: CAD software tools. Learn how to build thesA modern VLSI chip is a remarkably complex beast: billions of transistors, millions of logic gates deployed for computation and control, big blocks of memory, embedded blocks of pre-designed functions designed by third parties (called “intellectual property” or IP blocks). How do people manage to design these complicated chips? Answer: a sequence of computer aided design (CAD) tools takes an abstract description of the chip, and refines it step-wise to a final design. This class focuses on the major design tools used in the creation of an Application Specific Integrated Circuit (ASIC) or System on Chip (SoC) design. Our focus in this first part of the course is on key Boolean logic representations that make it possible to synthesize, and to verify, the gate-level logic in these designs. This is the first step of the design chain, as we move from logic to layout. Our goal is for students to understand how the tools themselves work, at the level of their fundamental algorithms and data structures. Topics covered will include: Computational Boolean algebra, logic verification, and logic synthesis (2-level and multi-level).

课程大纲

周1
完成时间为 2 小时
Orientation
In this module you will become familiar with the course and our learning environment. The orientation will also help you obtain the technical
skills required for the course.
1 个视频 （总计 25 分钟）, 2 个阅读材料, 5 个测验

完成时间为 2 小时
Computational Boolean Algebra
In this module, we will introduce advanced Boolean algebra math concepts that make it possible to take a "computational" approach to
Boolean algebra.
6 个视频 （总计 91 分钟）, 2 个阅读材料

周2
完成时间为 7 小时
Boolean Representation via BDDs and SAT
Week 2 introduces two powerful and important representation techniques that allow us to do SERIOUS computational Boolean algebra, on
industrial-scale designs.
7 个视频 （总计 135 分钟）, 2 个阅读材料, 2 个测验

周3
完成时间为 3 小时
2-Level Logic Synthesis, and Multi-Level Logic Synthesis via the Algebraic Model
In Week 3, we will move from "representing" things to "synthesizing" things. In this case, synthesis means "optimization", or maybe the word
"minimization" is more familiar from hand work with Kmaps or Boolean algebra.
8 个视频 （总计 119 分钟）, 2 个阅读材料, 1 个测验

周4
完成时间为 7 小时
Multilevel Factor Extract and Don't Cares
You now know that to factor a multi-level network to reduce its complexity, you must look at the kernels and co-kernels. You know how to "get" these for any node. But -- what do you do with a big network to actually FIND the right common divisors? This is called EXTRACTION. We then look at a new opportunity to optimize multi-level logic: Don't Cares. In simple designs, we usually regard Don't Cares as "impossible inputs" -- things that just do not happen, so we can choose the value the hardware creates to minimize the logic.
8 个视频 （总计 123 分钟）, 2 个阅读材料, 3 个测验

周5
完成时间为 3 小时
Final Exam
There is no new content this week. Instead, you should focus on finishing the last problem set and completing the Final Exam.

预备知识

需要相关的编程经验（C++，Java），了解数据结构和算法的基本概念， 具备对数字设计的基本认识，包括： 布尔代数、三维可视化装配工艺规划软件（Kmaps）、逻辑门和触发器；了解有限状态自动机设计； 性代数和微积分达到工程学初级或高级线水平。 对超大规模集成电路的掌握程度达到本科生水平更好，但不是必需条件。 本课程相对独立，但是具备一定VLSI基础的学生可以跳过一些背景资料的学习。

参考资料

课程相对独立，不依赖于其他教材， 但是我们仍会推荐一些参考资料，例如在会议或期刊上发表的论文， 目前市面上还没有涵盖逻辑布局、表示法、优化、合成和验证的一站式单本教材， 所以课上我们会尽可能地做到全面完整。

常见问题

课上是否会学习工业设计软件的使用方法？
课程不属于所谓的"VLSI设计"课程，所以重点不是如何使用软件工具，而是如何构建设计工具软件。

学习这门课，我需要准备什么？
一台装有Windows、Mac或Linux系统的电脑，能编写、编译和运行程序，能运用Java或C++语言进行程序设计，对于部分编程作业来说，只要能读取输入文件，并按要求格式编写输出文件，同学们可以任意选择自己喜欢的语言进行编程.

学完这门课程，我最大的收获是什么？
如何利用超酷算法和数据结构实现逻辑与布局的合成？我们可以创建一个6-7变量卡诺图，然后迎接头脑风暴的到来，现代计算辅助设计可用于设计百万门数量级的逻辑门电路，很显然，这是一个创造神奇的年代，赶快加入我们，一起探寻其中的奥妙吧。